1. Field of the Invention
The present invention relates to electronic devices, and more particularly, to an electronic device having a heat dissipating element and a fabrication method thereof.
2. Description of Related Art
To meet demands of electronic products for improved function and processing speed, semiconductor chips that serve as core components of the electronic products are required to have high-density electronic components and electronic circuits. However, such a semiconductor chip generates a lot of heat during operation and an encapsulant that encapsulates the semiconductor chip is usually made of a material having a poor thermal conductive characteristic. For example, the material has a thermal conductivity of 0.8 W/mk. As such, the semiconductor chip has a low heat dissipating efficiency. If heat generated by the semiconductor chip cannot be dissipated effectively, the semiconductor chip may be damaged or the product reliability may be reduced.
To overcome the above-described drawback, a heat sink or heat spreader is generally provided and attached to a back side of a chip through a thermal adhesive so as to facilitate heat dissipation. However, the use of the conventional thermal adhesive cannot meet the current process requirement. Accordingly, a thermal interface material (TIM) has been developed.
In a conventional TIM process, a solder material is used as a thermal conductive material and provided between the back side of the chip and the heat sink. In addition, a gold layer is coated on the back side of the chip to strengthen the bonding between the TIM layer and the chip, and a flux is applied to facilitate the bonding of the TIM layer to the gold layer.
However, the gold coating process easily causes pollution. Further, since the gold coating process and the use of the flux complicate the fabrication process and increase the fabrication cost, they cannot meet the cost-effective requirement of wafer manufacturers or packaging firms.
Further, as the flux volatiles when exposed to heat during a reflow process of the solder material, voids are formed in the TIM layer and occupy about 40% of the volume of the TIM layer, thus reducing the thermal conductive area and decreasing the product yield.
Accordingly, another TIM process has been developed, which uses Al2O3 as a thermal conductive material.
FIG. 1 is a schematic cross-sectional view of a conventional semiconductor package structure 1 and FIG. 1′ is a partially enlarged view of FIG. 1A. Referring to FIGS. 1 and 1′, a semiconductor chip 11 having an active surface 11a and an inactive surface 11b opposite to the active surface 11 is provided. The active surface 11a of the semiconductor chip 11 is bonded to a packaging substrate 10 through a plurality of conductive bumps 110 and an underfill 111 is formed between the active surface 11a of the semiconductor chip 11 and the packaging substrate 10 for encapsulating the conductive bumps 10. Then, a heat dissipating element 13 made of copper is bonded to the inactive surface 11b of the semiconductor chip 11 through a TIM layer 12. The TIM layer 12 includes an aluminum oxide material 120 and a plurality of polymer particles 121. Further, the heat dissipating element 13 has a plurality of support leads 131 for supporting the heat dissipating element 13 on the packaging substrate 10 through an adhesive layer 14.
In operation, heat generated by the semiconductor chip 11 is transferred to the heat dissipating element 13 through the inactive surface 11b of the semiconductor chip 11 and the TIM layer 12 so as to be dissipated to the outside of the semiconductor package structure 1.
However, in the conventional package structure 1, compared with the heat dissipating element 13 made of copper and having a thermal conductivity of 400 W/mK, the TIM layer 12 using the aluminum oxide material 120 as a thermal conductive material has an extremely low thermal conductivity of about 3.9 W/mK, thereby hindering effective thermal conduction.
Further, the CTE (Coefficients of Thermal Expansion) of the TIM layer 12 is close to that of the semiconductor chip 11 but significantly different from that of the heat dissipating element 13, thus easily causing serious warping and delamination of an upper portion 130 of the heat dissipating element 13 from the TIM layer 12. As such, both the thermal conduction effect and the product reliability are reduced.
Therefore, how to overcome the above-described drawbacks has become critical.